When writing a (GNU) Makefile, there are times when you need a particular target(s) to be run before anything else.

cross-posted from: https://lemmy.ml/post/6856563

When writing a (GNU) Makefile, there are times when you need a particular target(s) to be run before anything else. That can be for example to check the environment, ensure variables are set or prepare a particular directory layout.

… take advantage of GNU Make’s mechanism of includeing and makeing makefiles which is described in details in the manual:

  • EmbeddedEntropy@lemmy.mlEnglish
    1·
    8 months ago

    You may like an approach I came up with some time ago.

    In my included file that’s common among my Makefiles:

    # Ensure the macro named is set to a non-empty value.
varchk_call = $(if $($(1)),,$(error $(1) is not set from calling environment))

# Ensure all the macros named in the list are set to a non-empty value.
varchklist_call = $(foreach v,$(1),$(call varchk_call,$v))

    At the top of a Makefile that I want to ensure certain variables are set before it runs:

    $(call varchklist_call,\
        INSTDIR \
        PACKAGE \
        RELEASE \
        VERSION)

    I usually do these checks in sub-Makefiles to ensure someone didn’t break the top level Makefile by not passing down a required macro.